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TI925T ARM9TDMI Core
- Up to 132 MHz (maximum frequency)
- Voltage: 1.9v nominal
- 16KB I-cache; 8KB D-cache
- 192-KB of shared internal SRAM - frame buffer
- Support for 32-bit and 16-bit (Thumb mode) instruction sets
- Data and program MMUs
- Two 64-entry translation look-aside buffers (TLBs) for MMUs
- 17-word write buffer